1. Field of the Invention
The present invention relates to a display device and related driving method, and more particularly, to a display device and related driving method using a low capacity row buffer memory.
2. Description of the Prior Art
Due to advantages such as low radiation, thin appearance and low power consumption, liquid crystal display (LCD) devices have gradually replaced traditional cathode ray tube (CRT) displays and have been widely used in portable information products, such as notebook computers, personal digital assistants (PDA), flat panel televisions and mobile phones, etc.
Please refer to FIG. 1. FIG. 1 is a schematic diagram of a prior art LCD display device 10. The LCD display device 10 includes an LCD panel 12 and a timing controller 14. The LCD panel 12 includes a plurality of data lines D1-D2n and a plurality of scan lines G1-Gm, and is divided into a front port and a back port. The data lines D1-Dn are disposed on the front port of the LCD panel 12, while the data lines Dn+1-D2n are disposed on the back port of the LCD panel 12. Moreover, at each intersection of the data lines and the scan lines, a pixel unit (shown as a dot in FIG. 1) is installed for displaying images.
With increasing demands of large-size applications, the number of the data lines and the scan lines also increases. Thus, in order to drive the LCD panel 12 more efficiently, the timing controller 14 can generate driving signals respectively corresponding to the front port and the back port. The timing controller 14 includes a row buffer controller 16 and a row buffer memory 18. The row buffer controller 16 is utilized for receiving pixel input data DIN. The pixel input data DIN includes odd-numbered pixel input data DIN—ODD and even-numbered pixel input data DIN—EVEN, and is respectively stored at corresponding addresses of the row buffer memory 18. When outputting data to different pixels of a scan line, the row buffer controller 16 can read out the data stored at the corresponding addresses of the row buffer memory 18 to generate front port pixel output data DOUT—FRONT corresponding to the former half pixels of the scan line and back port pixel output data DOUT—BACK corresponding to the later half pixels of the scan line. Therefore, the timing controller 14 can output data to the pixel units of the scan line in sequence with a forward manner, that means, the front port pixel output data DOUT—FRONT is orderly outputted to the data line D1-Dn, while the back port pixel output data DOUT—BACK is orderly outputted to the data line Dn+1-D2n. A dashed arrow in FIG. 1 represents the order of the output data.
Please refer to FIG. 2. FIG. 2 is a schematic diagram of the prior art LCD display device 10 when outputting data in the forward manner. Assuming that the LCD panel 12 includes 1280 data lines, i.e. each scan line includes 1280 pixel units, the pixel input data DIN thus includes data D1-D1280, among which the odd-numbered pixel input data DIN—ODD includes the data D1, D3 . . . D1279 and the even-numbered pixel input data DIN—EVEN includes the data D2, D4 . . . D1280. Meanwhile, the front port pixel output data DOUT—FRONT includes the data D1-D640, and the back port pixel output data DOUT—BACK includes the data D641-D1280. At first, the prior art LCD display device 10 reads in the data D1-D1280 to corresponding addresses of the row buffer memory 18 in order. When outputting data in the forward manner, after the last data D640 of the front port pixel output data DOUT—FRONT is read in, the first data D641 of the back port pixel output data DOUT—BACK is then read in. At this time, the timing controller 14 can output the data to the LCD panel 12 with the order D1-D641-D2-D642- . . . -D640-D1280.
Please refer to FIG. 3. FIG. 3 is a schematic diagram of a prior art LCD display device 30. The LCD display device 30 includes an LCD panel 32 and a timing controller 34. The LCD panel 32 includes a plurality of data lines D1-D2n and a plurality of scan lines G1-Gm, and is divided into a front port and a back port. The data lines D1-Dn are disposed on the front port of the LCD panel 32, while the data lines Dn+1-D2n are disposed on the back port of the LCD panel 32. Moreover, at each intersection of the data lines and the scan lines, a pixel unit (shown as a dot in FIG. 3) is installed for displaying images. The timing controller 34 includes a row buffer controller 36 and a row buffer memory 38. Compared with the LCD display device 10 outputting data with the forward manner, the LCD display device 30 can output data to pixel units of a scan line in sequence with a backward manner, that means, the front port pixel output data DOUT—FRONT is orderly outputted to the data lines Dn-D1, and the back port pixel output data DOUT—BACK is orderly outputted to the data lines Dn+1-D2n. A dashed arrow in FIG. 3 represents the order of the output data.
Please refer to FIG. 4. FIG. 4 is a schematic diagram of the prior art LCD display device 30 when outputting data in the backward manner. Assuming that the LCD panel 32 includes 1280 data lines, i.e. each scan line includes 1280 pixel units, the pixel input data DIN thus includes data D1-D1280, among which the odd-numbered pixel input data DIN—ODD includes the data D1, D3 . . . D1279 and the even-numbered pixel input data DIN—EVEN includes D2, D4 . . . D1280. Meanwhile, the front port pixel output data DOUT—FRONT includes the data D1-D640, and the back port pixel output data DOUT—BACK includes the data D641-D1280. At first, the prior art LCD display device 30 reads in the data D1-D1280 to corresponding addresses of the row buffer memory 38 in order. When outputting data in the backward manner, after the last data D640 of the front port pixel output data DOUT—FRONT is read in, the first data D641 of the back port pixel output data DOUT—BACK is then read in. At this time, the timing controller 34 can output the data to the LCD panel 32 with the order D640-D641-D639-D642- . . . -D1-D1280. Since when outputting the front port pixel output data, the data that is read in much earlier is outputted much later, so that the row buffer memory 38 with a large capacity needs to be used for the prior art LCD display device 30.